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FPGA Engineer - Open RAN Radio Unit

Eridan · Zagreb

Novo
Mid 3,500 - 4,300 EUR/mjesec 🇬🇧 English
FPGA Zynq Versal RTL VHDL Verilog SystemVerilog Questa Git Linux

Opis radnog mjesta

About the role

Eridan is looking for a mid-level FPGA Engineer to join its team and help develop and evolve its Open RAN Radio Unit (RU) platform. The role suits someone who combines solid FPGA expertise with a strong understanding of digital signal processing and compute architectures, particularly in AI-driven systems.

Key responsibilities

  • Design, develop and integrate FPGA-based solutions for Open RAN Radio Units.
  • Implement and optimise digital signal processing (DSP) algorithms for high-performance compute applications.
  • Work with Xilinx (AMD) FPGA technologies, including Zynq-based platforms; Versal experience is a plus.
  • Integrate and validate designs using Vivado, ensuring timing closure, proper routing and correct backend implementation.
  • Collaborate with system and software teams to turn algorithmic requirements into efficient hardware implementations.
  • Contribute to feature development and enhancements of existing ORAN RU products.
  • Take part in board bring-up, debugging and hardware validation, and analyse performance bottlenecks across FPGA and system-level designs.

Required profile

  • 3-6 years of experience in FPGA design and development.
  • Strong understanding of DSP concepts and their hardware implementation, and solid knowledge of compute architectures with interest in AI/ML acceleration on FPGA.
  • Good digital design principles and RTL design (VHDL/Verilog/SystemVerilog) and simulation workflows.
  • Familiarity with timing closure, synthesis and place-and-route processes.
  • Experience with hardware debugging tools, board bring-up, scripting and Linux environments.

Required skills

  • Xilinx (AMD) tools and platforms, especially Vivado and Zynq; Siemens Questa simulation tools.
  • Git, GitHub and continuous integration principles.
  • Nice to have: Xilinx Versal platforms, telecommunications background, Open RAN architecture and protocols, and high-speed interfaces such as Ethernet, PTP, SyncE and JESD204.

What we offer

  • Salary range of EUR 3,500 to EUR 4,300 plus benefits.
  • Work on new technology with a significant impact on global infrastructure.
  • A flexible environment where you can learn, develop and advance.
  • Collaboration with smart, passionate colleagues and company-wide celebration of progress.

Questions fréquentes

Le salaire proposé pour ce poste est de 4-4k EUR par mois. Le détail figure dans l'annonce.
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Istječe za 1 mjesec

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Eridan

Zagreb